The Official Radare2 Book | страница 95



Here is the complete instruction set used by the ESIL VM:

ESIL OpcodeOperandsNameOperationexample
TRAPsrcTrapTrap signal
$srcInterruptinterrupt0x80,$
()srcSyscallsyscallrax,()
$$srcInstruction addressGet address of current instruction stack=instruction address
==src,dstComparestack = (dst == src) ; update_eflags(dst - src)
<src,dstSmaller (signed comparison)stack = (dst < src) ; update_eflags(dst - src)[0x0000000]> "ae 1,5,<" 0x0 > "ae 5,5" 0x0"
<=src,dstSmaller or Equal (signed comparison)stack = (dst <= src) ; update_eflags(dst - src)[0x0000000]> "ae 1,5,<" 0x0 > "ae 5,5" 0x1"
>src,dstBigger (signed comparison)stack = (dst > src) ; update_eflags(dst - src)> "ae 1,5,>" 0x1 > "ae 5,5,>" 0x0
>=src,dstBigger or Equal (signed comparison)stack = (dst >= src) ; update_eflags(dst - src)> "ae 1,5,>=" 0x1 > "ae 5,5,>=" 0x1
<<src,dstShift Leftstack = dst << src> "ae 1,1,<<" 0x2 > "ae 2,1,<<" 0x4
>>src,dstShift Rightstack = dst >> src> "ae 1,4,>>" 0x2 > "ae 2,4,>>" 0x1
<<<src,dstRotate Leftstack=dst ROL src> "ae 31,1,<<<" 0x80000000 > "ae 32,1,<<<" 0x1
>>>src,dstRotate Rightstack=dst ROR src> "ae 1,1,>>>" 0x80000000 > "ae 32,1,>>>"0x1
&src,dstANDstack = dst & src> "ae 1,1,&" 0x1 > "ae 1,0,&" 0x0 > "ae 0,1,&" 0x0 > "ae 0,0,&" 0x0
|src,dstORstack = dst | src> "ae 1,1,|" 0x1 > "ae 1,0,|" 0x1 > "ae 0,1,|" 0x1 > "ae 0,0,|" 0x0
^src,dstXORstack = dst ^src> "ae 1,1,^" 0x0 > "ae 1,0,^" 0x1 > "ae 0,1,^" 0x1 > "ae 0,0,^" 0x0
+src,dstADDstack = dst + src> "ae 3,4,+" 0x7 > "ae 5,5,+" 0xa
-src,dstSUBstack = dst - src> "ae 3,4,-" 0x1 > "ae 5,5,-" 0x0 > "ae 4,3,-" 0xffffffffffffffff
*src,dstMULstack = dst * src> "ae 3,4,*" 0xc > "ae 5,5,*" 0x19
/src,dstDIVstack = dst / src> "ae 2,4,/" 0x2 > "ae 5,5,/" 0x1 > "ae 5,9,/" 0x1
%src,dstMODstack = dst % src> "ae 2,4,%" 0x0 > "ae 5,5,%" 0x0 > "ae 5,9,%" 0x4
~bits,srcSIGNEXTstack = src sign extended> "ae 8,0x80,~" 0xffffffffffffff80
~/src,dstSIGNED DIVstack = dst / src (signed)> "ae 2,-4,~/" 0xfffffffffffffffe
~%src,dstSIGNED MODstack = dst % src (signed)> "ae 2,-5,~%" 0xffffffffffffffff
!srcNEGstack = !!!src> "ae 1,!" 0x0 > "ae 4,!" 0x0 > "ae 0,!" 0x1
++srcINCstack = src++> ar r_00=0;ar r_00 0x00000000 > "ae r_00,++" 0x1 > ar r_00 0x00000000 > "ae 1,++" 0x2
--srcDECstack = src--> ar r_00=5;ar r_00 0x00000005> "ae r_00,--" 0x4 > ar r_00 0x00000005 > "ae 5,--" 0x4
=src,regEQUreg = src> "ae 3,r_00,=" > aer r_00 0x00000003 > "ae r_00,r_01,=" > aer r_01 0x00000003
:=src,reg